The naked truth about the Maximus VI Extreme

boardnoheatsinks 300x227 Asus Maximus VI Extreme (Z87) Review

This is the part where we remove the heatsinks and get into the nitty gritty. The gold plated chokes are a nice touch.


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The heatsinks make very good contact with the chips, and there are panels on the backside of the board which cool down the drivers.


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The VRM is an 8 phase which powers the internal VRM on the CPU known as the FIVR.


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ASUS is using one NexFET per phase, the 87350D which are made by Texas Instruments and are capable of 40A per phase. These are co-package MOSFETs which means they have two Low RDS (ON) MOSFETs in one package (so a power stage minus the driver), ASRock calls these dual-stack. These specific ones have very good characteristics when it comes to thermals. ASUS has also implemented some brand new 60A chokes with some gold plating, these are custom made chokes. IR3535 drivers are on the backside, there is one per phase indicating no phase doubling, this is a true 8 phase VRM which is a big upgrade from the Maximus V Extreme which didn’t have a flattering VRM. ASUS is using 10K metallic capacitors as well, however on their mainstream boards they only use the 5K rated ones.


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It is all controlled by a Digi+ EPU which is most likely an IR3563A/B which is a very capable 8 phase Digital PWM.


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The memory VRM is more interesting, as it is using some brand new NexFETs, the X87588 from Texas Instruments capable of  25A each, they are those slim silver things on each side of the two capacitors in the above picture. This VR is controlled by another PWM from IR, most likely an IR3570, which is pictured above.


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Here we have the PEX8747 which is a 48-lane PCI-E 3.0 switch chip, 16 to the CPU and 32 down to the lanes. 8 PCI-E 3.0 lanes are directly routed from the CPU to the first red PCI-E lane, the second 8x from the CPU (the CPU has a total of 16x lanes) is routed to 4x ASM1480 switches which can route the lanes to a second set of 4x ASM1480 switches or back to the first slot for 16x directly from the CPU. The second set of four switches can switch the lanes to the black slot for 8x/8x PCI-E 3.0 from the CPU, or it can switch 8x lanes to the PEX8747 which is then hard routed to the other red slots for 3-way and 4-way multi GPU configurations.


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This is another PLX branded IC, the PEX8605 which is a 1:3 PCI-E switch meaning it can take in 1 lane and make it 3. We can add up the number of PCI-E devices and the number of lanes they need below:

PCI-E Devices:

mPCI-E Combo = 1x (or 2x)

2 SATA controllers=2x

4x slots = 4x

1 NIC= 1x

Total =8 or 9

Now we can examine FlexIO ports, Flex IO can take 2 PCI-E from the PCH (total 8 but can go down to 6 or 7) and trade them for USB 3.0 or SATA 3.0. The Maximus VI Extreme uses 6 SATA3.0 so the max PCI-E can be 8 at this point if only 4 USB 3.0 are used, however there are a total of 5 USB 3.0 lanes used, so the PCH only has 7 PCI-E lanes to offer. The PEX8605 makes that a total of 9 PCI-E lanes which matches exactly to the count above.


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Four of the USB 3.0 ports are directly hooked to the ports (2 for the internal header and 2 to the backpanel) however 4 of them come from a ASM1074 hub which takes in 1 USB port and gives out 4. The total USB 3.0 count from the PCH is 5.


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Audio is provided by the new ALC1150 with up to 115dB SNR on the headphone jack in the back.


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Two ASM1061 SATA3.0 controllers are pictured above along with the NCT6791D NuvoTon SuperIO and a ROG IC which controls some of the other ROG features. The PCH is also in the picture above.


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Above you can also see some other small ICs, one says BIOS on it, this should be the EC controller. There is another ROG controller near the dual 64MBit (8MB) BIOS ROMs, that IC should control some of the ROG Connect functionality.


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This image shows (from left to right) a Parade PS8271 HDMI level shiter (to convert the digital video to HDMI), a i217v (the new Intel NIC) , and some other chips like the ASM1267 which is a signal re-driver to extend PCI-E signal for the mPCIe combo slot. There is actually a decent amount of hardware (including power circuitry) to properly support the mPCIe slot at the top of the board.


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The PCB is 8 layers to accommodate all the hardware.


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Above near the PEX8747 are a lot of linear regulators, their purpose isn’t known to us, but we can assume they power the PEX8747 or help the FIVR bypass by helping power the other domains while the FIVR is being bypassed.  ASUS has implemented a bypass for the FIVR so that users can override Intel’s built in voltage regulator. This is useful on an engineering sample stepping, the QE6S, which had severe vdroop over 1.5v, with the bypass you can go much higher. However the FIVR bypass wont have as clean power as the FIVR because it is the VRM input, so you can try it for yourself to test and see if it helps. In our testing we found that it didn’t really help much with out CPU, but it might help you.