During Intel’s ‘Design in Asia’ tour, we had chance to peep into the labs…
As a very large multinational, it’s little wonder Intel has a variety of manufacturing, design and research facilities all over the world? But, could anyone guess that also, roughly a quarter of Haswell core was designed in Malaysia, not to mention the CPU floor plans too? Yes, Intel does have a huge CPU and SOC design resource there too, including some ‘rock star’ engineers, as Intel would call them, that lead big internal projects.
Last week there was chance to do a peep in the labs thanks to Intel’s regional folks, seeing the facilities where the next Atom and Core processors are validated, tested and – of course internally – benchmarked. Besides the sophisticated measurement tools, the usual PC benchmarks like Sandra and 3D Mark seem to find their way in there just as well, and the test benches don’t look that different from typical high end hardware enthusiasts benchmarking test platforms.
One sorting machine took my fancy, though – it had about a dozen very large CPU packages, similar to the current Socket 2011 but with somewhat thicker upper part. Market ‘HSW EP’, it was matched with a sort of rapid socket plug-in tester that actually had two sockets for a dual CPU configuration, with only one being active. The testing board with the socket said HASWELL-X EP so yes, this would be the Socket 2011-3 Haswell EP or Xeon E5 v3 that we reported about many times before, including its 14 core 35 MB cache, in excess of 700 GFLOPs DP FP per socket, quad channel DDR4-2133 memory, twin sped up 9.6 GT/s QPI channels and so on.
Remember, these chips are still at least a year away from commercial announcement – after all, even their IvyBridge EP still has to wait till end summer to show up in public – but Intel seems to be ready for Haswell Xeons already, at least at QS stage. So, if all OK, selected ‘privileged’ customers might be getting fully working ES of these lovely chips before yearend, I guess.