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HP New Manufacturing Technique For Future Chips

Researchers at HP believe they have developed a manufacturing technique that will allow chip makers to push the performance envelope after conventional transistors reach the atomic level. The technique, based on a mathematical principle called coding theory, will let future generations of microprocessor circuits be reliably manufactured in high volumes. Basically, HP has discovered a method of ensuring that these silicon nanowires can continue to function even if manufacturing defects partially sever the connection between the crossbar and the rest of the circuit. This is an important advance, as the crossbar design will only catch on with chip makers if it can be reliably manufactured in high volumes. HP has demonstrated its new crossbar design in a computer simulation, but it has also built prototype devices that work using the technology. The crossbar architecture is expected to first appear in chips built using the 22nm process technology, which is expected to be adopted by the microprocessor industry around 2016.

Researchers at HP believe they have developed a manufacturing technique that will allow chip makers to push the performance envelope after conventional transistors reach the atomic level. The technique, based on a mathematical principle called coding theory, will let future generations of microprocessor circuits be reliably manufactured in high volumes. Basically, HP has discovered a method of ensuring that these silicon nanowires can continue to function even if manufacturing defects partially sever the connection between the crossbar and the rest of the circuit. This is an important advance, as the crossbar design will only catch on with chip makers if it can be reliably manufactured in high volumes. HP has demonstrated its new crossbar design in a computer simulation, but it has also built prototype devices that work using the technology. The crossbar architecture is expected to first appear in chips built using the 22 nanometer process technology, which is expected to be adopted by the microprocessor industry around 2016.

TeamVR
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