IBM researchers unveiled details of a new technique to significantly increase capabilities to cool computer chips. The technique, developed by a team of scientists at the IBM Zurich Research Laboratory in cooperation with Momentive Performance Materials, formerly GE Advanced Materials, overcomes a barrier in chip cooling by improving the application of the “glue” that binds chips to their cooling systems. The new technology could allow faster computer chips to be cooled more efficiently. To improve the glue’s heat-conducting properties, it is enriched with micrometer-sized metal or ceramic particles. These particles form clusters that build “heat-evacuation bridges” from the chip to the cooler to compensate for the glue’s shortcomings. However, even highly particle-filled pastes are still inefficient, consuming up to 40 percent of the overall thermal budget, i.e. the cooling capacity available to draw heat away from the chip.

At the IEEE Semi-Therm Conference 2007, IBM researchers unveiled details of a
new technique to significantly increase capabilities to cool computer chips.

The technique, developed by a team of scientists at the IBM Zurich Research
Laboratory in cooperation with Momentive Performance Materials, formerly GE
Advanced Materials, overcomes a barrier in chip cooling by improving the
application of the “glue” that binds chips to their cooling systems. The new
technology could allow faster computer chips to be cooled more efficiently.

In today’s computer chips, as the circuits on chips become increasingly smaller,
chips generate more heat than ever before. To remove the heat from the chip, a
cooling system is attached to the microprocessor using a special adhesive or
glue. This glue is necessary to bind the two systems together, yet it poses a
real barrier in heat transport.

To improve the glue’s heat-conducting properties, it is enriched with
micrometer-sized metal or ceramic particles. These particles form clusters that
build “heat-evacuation bridges” from the chip to the cooler to compensate for
the glue’s shortcomings. However, even highly particle-filled pastes are still
inefficient, consuming up to 40 percent of the overall thermal budget, i.e. the
cooling capacity available to draw heat away from the chip.

IBM researchers now unveiled the reason and presented a novel technique to solve
this problem. By observing how the glue spreads when a chip is attached to its
cooling element, scientists noticed that a cross formed in the paste as large
numbers of particles were piling up, inhibiting the layers of glue from
spreading out. The scientists were able to trace the cause of this back to the
flow behavior of the paste, which simply follows the path of least resistance.
Along the diagonals, the particles are pulled in opposite directions and, as a
result, they remain where they are. As the squeezing process continues, however,
they begin to pile up, forming what scientists call the “magic cross”.

To overcome this problem, the team designed a special layout of micrometer-sized
channels — or trenches — in a tree-like branched structure consisting of larger
and smaller channels. This structure functions like an irrigation system for the
paste at exactly those spots where the particles would pile up. This allows the
particles to spread more homogeneously and reduces the thickness of the
resulting paste gap.

The results obtained are impressive: The paste thickness was reduced by a factor
of 3, and the pressure needed to squeeze the paste to the same bondline
thickness was reduced to a similar extent. These lower assembly pressures ensure
that the delicate components and interconnects below the chip are not damaged as
the chip package is created. The channels also allow pastes with higher fill
factors and higher bulk thermal conductivity to be squeezed into thinner gaps,
thereby reducing the thermal resistance of the paste interface considerably by
more than a factor of 3. The new technology allows air-cooling systems to remove
more heat and helps to improve the overall energy efficiency of computers.

To further optimize the technology in real cooling systems and to demonstrate
its feasibility, the IBM team cooperated with paste manufacturer Momentive
Performance Materials, Wilton, CT, USA.

Together with other industry-leading suppliers, tools are being developed to
define the surface channels through the same copper stamping process currently
used to fabricate high-volume chip lids. This will define a full supply chain of
low-cost parts to quickly integrate the new technique into products.

The work entitled “Hierarchical Nested Surface Channels for Reduced Particle
Stacking and Low-Resistance Thermal Interfaces” by R. J. Linderman, T.
Brunschwiler, U. Kloter, H. Toy, B. Michel will be published in Proc. 23rd IEEE
Semi-Therm Symp. 2007.

 

Schematic HCTI text IBM Unveils Super Conductive Thermal Paste

Schematic of the interface technology and cooling system. The
image shows a cross-sectional schematic of the cooling architecture using the
branched channel design. A highly viscous paste is brought between the chip cap
and the hot chip in order to reduce the thermal resistance. Thanks to the
tree-like branched “trenches” in the copper cap, the paste spreads very
homogeneously and attains a thickness of less than 10 micrometers. With this
technique, only half the pressure is needed to apply the paste and a twofold
increase in cooling performance can be achieved.

Image1 pastecross 72 IBM Unveils Super Conductive Thermal Paste

The image shows the “magic cross” that forms when particles in
the paste pile up along the diagonals during the squeezing process with the
conventional technology.

Image2 pastecross 72 IBM Unveils Super Conductive Thermal Paste

The image shows the “magic cross” that forms when the paste is
applied in a conventional cooling system. Owing to the flow behavior of the
paste, particles pile up at the diagonals, causing thick and inhomogeneous
layers of the paste that worsen the cooling efficiency significantly.

 

Image3 paste IBM Unveils Super Conductive Thermal Paste

The right-hand image shows the paste after being applied using
the new technology. The pattern arises from the hierarchical channel design of
the interface that controls and optimizes the spread of the paste. The schematic
on the left shows the hierarchical microchannel design for a 14-mm chip. Solid
lines represent the first-level hierarchy, which is 220 micrometers wide,
long-dashed lines = 150 micrometers width, short-dashed lines = 150 micrometers
width. An example of a third-level channel design is shown in the upper
left-most cell.