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IBM Uses eDRAM As Cache For 45nm CPUs

IBM plans to unveil a new way of putting memory on processors that it thinks will dramatically improve performance. IBM uses SOI to reduce current leakage from the transistors it builds for processors like the Power 5, and had used embedded DRAM in certain chips such as its Blue Gene processors. Processors built on IBM’s 45-nm manufacturing technology will be the first products able to take advantage of the embedded DRAM. Those are expected in 2008. IBM envisions putting anywhere from 24MB to 48MB of on-chip cache memory into those processors.

IBM plans to unveil a new way of putting memory on processors that it thinks will dramatically improve performance. For years, chipmakers have used SRAM on processors, but as chips grow smaller, SRAM is having a hard time keeping up. Problems are cropping up with current leakage, and designers would like to use embedded DRAM, which requires fewer transistors and is less leaky. IBM uses SOI to reduce current leakage from the transistors it builds for processors like the Power 5, and had used embedded DRAM in certain chips such as its Blue Gene processors. Processors built on IBM’s 45nm manufacturing technology will be the first products able to take advantage of the embedded DRAM. Those are expected in 2008. IBM envisions putting anywhere from 24MB to 48MB of on-chip cache memory into those processors.

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