Intel Conroe To Win AMD Windsor By 20%

Intel expects its forthcoming Conroe and Merom chips to deliver a performance advantage of at least 20 percent over chips from AMD that are slated to be released at the same time. It has 14 pipeline stages, ability to issue 4 instructions per clock, uses advanced branch prediction technology and has 4MB unified cache. The combination of all those architectural changes will allow Intel to outperform AMD’s planned offerings for the second half of 2006 without having to resort to adopting AMD’s integrated memory controller design. Instead, Intel will count on its microarchitectural improvements and a faster FSB to deliver the 20 percent improvement in performance over AMD’s chips, based on standard benchmarks.


Intel expects its forthcoming Conroe and Merom chips to deliver a performance advantage of at least 20 percent over chips from AMD that are slated to be released at the same time. It uses 14 pipeline stages instead of the 31 used by Intel’s Pentium 4 processors. The microarchitecture also allows the processor to issue four instructions per clock. It uses advanced branch prediction technology borrowed from the Pentium 4 designs. Chips built on that microarchitecture will also share the 4MB unified cache. The combination of all those architectural changes will allow Intel to outperform AMD’s planned offerings for the second half of 2006 without having to resort to adopting AMD’s integrated memory controller design. Instead, Intel will count on its microarchitectural improvements and a faster FSB to deliver the 20 percent improvement in performance over AMD’s chips, based on standard benchmarks.

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