samsung ddr4 2 Intel move to DDR4 to start with high end server CPUs in early 2014?

Over the years, Intel held to a steady strategy of launching new CPU architectures or processes first in the high end products, yet introducing new memory technologies at the mainstream. Now, the roles seem to have been reversed…

Remember the good old days when, if wanting to get hold of that new CPU microarchitecture, or semiconductor process shrink, you knew you'd have to get it in the high end parts like enthusiast desktop or workstation / server processors first. On the other hand, the memory generational chances – for safety or other sake – occured first in the mainstream lines, such as Rambus or DDR3 memory introduction, at least a year before such stuff appears in high end product lines.

Now, it's all opposite: there's often a year or more gap between the mainstream and the high end offerings in introducing the new semiconductor process, as witnessed by the Sandy Bridge base 4-core vs Sandy Bridge-EP high end 8-core parts, the latter being a year later. How about the memory then?
 
Well, it seems the role reversal will hit us there too, two years from now. Our sources say that, while the mainstream Haswell 4-core platform will still stay on DDR3 – and nothing wrong with that, since by then DDR3 will approach 3000 speed grade – the high end Haswell-EX 4-socket plaform, with each chip having 16 or so cores, will for the first time, support DDR4 memory, in 2014. These monstrous chips, allowing upwards of 60 cores on each four socket mainboard, will bring a new meaning to a 'multi-core monster'. On the memory side, since DDR4 brings lower power consumption with 1.2v power supply, as well as better parity protection and recovery from errors, the benefits are there, even without the speed increase.
 
For the desktop side, the 22 nm Haswell and its 14 nm Broadwell successor would share the same LGA1150 socket, therefore both supporting DDR3 memory only, with DDR4 support likely only with their 2015 successors and a new microarchitecture at that time. So, here we have a one-year lag between high end and the low end for the new generation memory support, with the low end being the late one this time.
 
It's not as if it may matter much for the mainstream Haswell and Broadwell chips, anyway, since their top GT3 bin L4 cache which we exclusively described here, will sit on a very wide low latency internal MCM bus, and, possibly for GPU use, be able to function as directly addressable scratchpad memory as well. Also, since Haswell has such high FP peak issuing rate, double that of Sandy/Ivy Bridge, with its FMA (Fused Multiply-Add) operations, the extra bandwidth of this L4 memory should be very usable by the CPU as well. In the later generations, DDR4 may help solve the bandwidth problem, but the extra latency cost is not clear yet, though.