The existing E6300 and E6400 has 4MB L2 onboard but half of its cache disabled so costs are naturally higher since the transistors are there. Intel will therefore release native 2MB L2 Conroe and Merom (Santa Rosa Platform – 800FSB/Socket P) in Feb 2007 which sport smaller die size (~30% smaller) as well as fewer capacitors on the package. It will lower their production cost to compete against AMD upcoming 65nm native 1MB L2 and 512KB L2 processors. The native 2MB L2 Conroe includes Core 2 Duo E6300 (1.86GHz), E6400 (2.13GHz), Xeon 3040 (1.86GHz) and Xeon 3050 (2.13GHz). The stepping will change from B2 to L2 and has new SSPEC and MM, and CPUID will change from 6F6 to 6F2. A BIOS update is needed to recognize the CPUs properly.

The existing E6300 and E6400 has 4MB L2 onboard but half of its cache disabled so costs are naturally higher since the transistors are there. Intel will therefore release native 2MB L2 Conroe and Merom (Santa Rosa Platform – 800FSB/Socket P) in Feb 2007 which sport smaller die size (~30% smaller) as well as fewer capacitors on the package. It will lower their production cost to compete against AMD upcoming 65nm native 1MB L2 and 512KB L2 processors. The native 2MB L2 Conroe includes Core 2 Duo E6300 (1.86GHz), E6400 (2.13GHz), Xeon 3040 (1.86GHz) and Xeon 3050 (2.13GHz). The stepping will change from B2 to L2 and has new SSPEC and MM, and CPUID will change from 6F6 to 6F2. A BIOS update is needed to recognize the CPUs properly.