Intel today disclosed more details about its new low power IA
microarchitecture, which is the basis of the 45nm high-k metal gate Silverthorne
processor being targeted for first-generation Mobile Internet Devices. It is fully compatible with the Core 2 Duo
instruction set, is based on dual-code, dual-issue, in-order execution and
implements a 16-stage processor pipeline. It supports Intel Hyper-Threading
Technology too, delivers
sub-watt performance and a 2 GHs speed at one watt some time in the future.

Intel today disclosed more details about its new low power IA
microarchitecture, which is the basis of the 45nm high-k metal gate Silverthorne
processor being targeted for first-generation Mobile Internet Devices.

• This microarchitecture will be fully compatible with the Core 2 Duo
instruction set, is based on dual-code, dual-issue, in-order execution and
implements a 16-stage processor pipeline. The microarchitecture will implement
ground-breaking power management techniques such as Deep Power Down (C6) state,
non-grid clock distribution, power-optimized register-file, clock gating, CMOS
bus mode and split IO power supply to aggressively reduce dynamic and leakage
power.
• As a result of these innovative power management techniques, the 45nm high-k
metal gate Silverthorne processor is expected to achieve a 10x lower thermal
power level (compared to the Ultra Low Voltage single-core Intel processors in
2006) while delivering high performance to run the full Internet and breadth of
software applications.
• The microarchitecture, which was built from the ground up, will also deliver
sub-watt performance and a 2 GHs speed at one watt some time in the future.

 

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