Intel Xeon Takes New G1 Stepping

Intel® Xeon™ Processor will undergo the following changes for the E-0 to G-1
core processor stepping change:

CPUID will change from 0F41h to 0F49h
E-0 is pin compatible with G-1
New S-Specs for converting products
The G-1 stepping will also be the conversion to a Pb
Free SLI / RoHS compliant device


The Register
reveals that the changes involved a pair of extra EM64T
instructions; LAHF and SAHF. The move will finally bring the 64-bit server chips
into full compatibility with AMD’s AMD64 technology. The fully AMD64-compatible
Xeons are due to sample on 17 October, the day on which the chip giant will also
ship samples of fully AMD64-compatible Pentium 4 5×1 processors. The updated P4s
are expected to ship in volume on 14 November, with full Xeon availability
following a week later on 28 November.

 Intel Xeon Takes New G1 Stepping

Intel® Xeon™ Processor will undergo the following changes for the E-0 to G-1
core processor stepping change:

CPUID will change from 0F41h to 0F49h
E-0 is pin compatible with G-1
New S-Specs for converting products
The G-1 stepping will also be the conversion to a Pb
Free SLI / RoHS compliant device


The Register
reveals that the changes involved a pair of extra EM64T
instructions; LAHF and SAHF. The move will finally bring the 64-bit server chips
into full compatibility with AMD’s AMD64 technology. The fully AMD64-compatible
Xeons are due to sample on 17 October, the day on which the chip giant will also
ship samples of fully AMD64-compatible Pentium 4 5×1 processors. The updated P4s
are expected to ship in volume on 14 November, with full Xeon availability
following a week later on 28 November.