AMD detailed its efforts to add elements such as memory management, input/output functions that support virtualization code-named Pacifica. One of the chipmaker’s main goals in offering Pacifica is to eliminate the need for software heroics by implementing several features that help make virtualization possible in its chips. The additions will allow hypervisor software, which acts like a traffic cop for a system running virtualization, to be made much less complex and therefore offer better performance and take less computing power to run in the future. The first Pacifica chips, which will include dual-core and singles-core Athlon 64s and Opterons, will hit the market in the first half of 2006.

Executives from AMD, in a presentation at this week’s Processor Forum in San Jose, Calif., detailed its efforts to add elements that support virtualization code-named Pacifica. AMD’s presentation included details on its approach to important elements of virtualization, such as memory management. AMD also detailed future additions to Pacifica, such as adding support for virtualization of input/output functions. One of the chipmaker’s main goals in offering Pacifica is to eliminate the need for software heroics by implementing several features that help make virtualization possible in its chips. The additions will allow hypervisor software, which acts like a traffic cop for a system running virtualization, to be made much less complex and therefore offer better performance and take less computing power to run in the future. The first Pacifica chips, which will include dual-core and singles-core Athlon 64s and Opterons, will hit the market in the first half of 2006.