Innovative Silicon unveiled a basic technology for DRAM that does not require storage capacitors in the bit cells. The approach, dubbed Z-RAM, uses the floating-body effect in SoI transistors as a storage mechanism. The result is a DRAM cell that can be fabricated in a standard SoI CMOS logic process, occupies half the area of a trench-capacitor DRAM cell in the same geometry and offers significant advantages over capacitor-based DRAM cells in both speed and power. The company has in hand 90-nm silicon with functioning test cells, and has demonstrated read and write times under 3 ns on individual cells. The memory is fast enough to serve as L2 cache for most embedded processors or L3 cache on high-performance processors. It can also be used for conventional embedded DRAM applications such as frame buffer memory or instruction store. As scaling problems make trench-capacitor DRAM increasingly difficult to design, Innovative expects Z-RAM technology to be used for stand-alone memory chips as well.

Innovative Silicon unveiled a basic technology for DRAM that does not require storage capacitors in the bit cells. The approach, dubbed Z-RAM, uses the floating-body effect in SoI transistors as a storage mechanism. The result is a DRAM cell that can be fabricated in a standard SoI CMOS logic process, occupies half the area of a trench-capacitor DRAM cell in the same geometry and offers significant advantages over capacitor-based DRAM cells in both speed and power. The company has in hand 90-nm silicon with functioning test cells, and has demonstrated read and write times under 3 ns on individual cells. The memory is fast enough to serve as L2 cache for most embedded processors or L3 cache on high-performance processors. It can also be used for conventional embedded DRAM applications such as frame buffer memory or instruction store. As scaling problems make trench-capacitor DRAM increasingly difficult to design, Innovative expects Z-RAM technology to be used for stand-alone memory chips as well.