PCI-SIG announced today that the data rate for the next planned revision of the PCI Express specification will be 5 Giga transfers per second. This new specification extends the performance capability of its flagship I/O interconnect architecture to meet the anticipated system requirements across computer and communication industry applications. The doubling of the data rate follows historical performance increases for I/O specifications in the industry. Many of the leading electrical experts who developed the PCI Express 1.0a specifications have been chartered to draft the new specification. The PCI-SIG expects to deliver the new specification in the second half of 2005 in time for product introductions beginning in 2007.

The PCI-SIG®, the Special Interest Group responsible for PCI Express™
architecture, announced today that the data rate for the next planned revision
of the PCI Express specification will be 5 Giga transfers per second. This new
specification extends the performance capability of its flagship I/O
interconnect architecture to meet the anticipated system requirements across
computer and communication industry applications. The doubling of the data rate
follows historical performance increases for I/O specifications in the industry.

The PCI-SIG board of directors considered market requirements and technical
analysis of a range of data rates to obtain the most feasible, highest
performance, backward compatible solution within the current PCI Express
ecosystem. Platform implementation cost, high-volume manufacturability, system
topologies, validation and interoperability were the key considerations studied
by the PCI-SIG board members in the process to extend the PCI Express data rate
to 5GT/s.

Many of the leading electrical experts who developed the PCI Express 1.0a
specifications have been chartered to draft the new specification. The PCI-SIG
expects to deliver the new specification in the second half of 2005 in time for
product introductions beginning in 2007.

"The PCI-SIG continues to deliver on the promise of timely PCI Express
enhancements to meet the ever-growing bandwidth requirements of the I/O
industry," said Tony Pierce, PCI-SIG chairman. "The board of directors
thoughtfully considered an array of technical and market data and arrived at the
best decision for the next revision of the PCI Express architecture. We plan to
deliver the new 5GT/s PCI Express specification consistent with our members’
expectations for 100% backward compatibility, low-cost manufacturability and
world-class compliance and interoperability."

"The new 5GT/s PCI Express specification will enable the required performance
boost for bandwidth-hungry applications such as cinema-quality graphics and
multimedia, enterprise servers and storage, and multi-gigabit networking," said
Ajay Bhatt, chairman of the PCI Express steering committee, responsible for
managing the technical development and coordination of PCI Express
specifications. "The electrical specification will introduce evolutionary
methodologies to meet the technical challenges of running at 5 Giga transfers
per second while maintaining compatibility with existing system topologies and
silicon processes."