TSMC has started manufacturing circuits using an 80-nanometer “half-node” process. This sits between 90-nm and the next step on the International Technology Roadmap for Semiconductors at 65-nm. Fabless graphics chip companies ATI and NVIDIA have both indicated backing for the move. The provision of a half-node step allows designers to improve performance and reduce the size of their designs by up to 19 percent. This can result in more die per wafer and more than 20 percent reduction in cost-per-die for certain designs.

TSMC has started manufacturing circuits using an 80-nanometer “half-node” process. This sits between 90-nm and the next step on the International Technology Roadmap for Semiconductors at 65-nm. Fabless graphics chip companies ATI and NVIDIA have both indicated backing for the move. The provision of a half-node step allows designers to improve performance and reduce the size of their designs by up to 19 percent. This can result in more die per wafer and more than 20 percent reduction in cost-per-die for certain designs.