PCI Local Bus Turns 20, PCI-Express 10, PCI-SIG Looks Ahead
The Peripheral Component Interface (PCI) Special Interest Group (SIG) celebrated 20 years of the PCI local bus, an I/O technology in use by computers to this date. This is also the 10th year for PCI-Express interface, which drives most of today's high-bandwidth computer devices. The SIG gave us a glimpse of what lies ahead.
The Peripheral Component Interface (PCI) Special Interest Group (SIG) celebrated 20 years of the PCI local bus, an I/O technology in use by computers to this date. This is also the 10th year in market for PCI-Express interface, which drives most of today's high-bandwidth computer devices. The SIG gave us a glymse of what lies ahead.
(Image Credit: Jonathan Zander)
The PCI-SIG notes that while the greater part of the past 20 years posed challenges related to bandwidth, the future adds newer ones, including compacting the PCI-Express interface to newer, smaller form-factors, with newer electrical configurations. This leaves bandwidth (performance) and form-factors as the two factors the SIG has to keep in mind, when drafting future standards.
Addressing the issue of performance the SIG noted that development of a succeeding standard to PCI-Express Gen 3.0, the PCI-Express Gen 4.0, is already underway. PCI-Express 4.0 will be designed to further double bandwidth over its predecessor. A single PCI-Express 4.0 lane will be able to push 16 GT/s. The SIG also touched on the concept of PCIe-attached storage, pointing out how PCIe add-on card storage devices such as SSDs and HBAs benefit from processor-integrated PCI-Express 3.0 root complexes.
Addressing the issue of portability and proliferation to newer, smaller form-factors, the SIG talked about PCIe OCuLink, a new cable-based standard (such as Thunderbolt, USB), that lets two devices communicate with each other without a host-device hierarchy, with minimal protocol overhead. The standard appears to be based on PCI-Express 3.0 x1, and offers 8 Gb/s bandwidth (single-lane). The connector is designed to support up to four PCIe lanes, resulting in a staggering 32 Gb/s bandwidth. The SIG touched briefly on upcoming standards such as next-generation form-factor that's part of the Mini CEM specification, and the SFF-8639, a connector standard that will become relevant with PCIe-attached storage devices.