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Samsung Producing 90nm 512-Mbit DDR

Samsung has started mass producing 512-Mbit double data rate synchronous DRAMs using a 90nm manufacturing process and 300-mm diameter wafers. The 512-Mbit DRAM operates from a 2.5-V voltage supply and can be operated at both 400-MHz and 333-MHz clock frequency. The migration from 100-nm to 90nm processing boosts production by 40 percent. The keys to successful production at the 90-nm manufacturing process node are: short wave length argon fluoride lithography, alumina hafnium oxide (AHO) dielectric material applied within the DRAM capacitor to enhance data storage characteristics, and three-dimensional transistor circuitry.

Samsung has started mass producing 512-Mbit double data rate synchronous DRAMs using a 90nm manufacturing process and 300-mm diameter wafers. The 512-Mbit DRAM operates from a 2.5-V voltage supply and can be operated at both 400-MHz and 333-MHz clock frequency. The migration from 100-nm to 90nm processing boosts production by 40 percent. The keys to successful production at the 90-nm manufacturing process node are: short wave length argon fluoride lithography, alumina hafnium oxide (AHO) dielectric material applied within the DRAM capacitor to enhance data storage characteristics, and three-dimensional transistor circuitry.

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