Tri-gate Transistors To Lower Leakage Current
Intel has introduced a new technique of shaping transistors on die to reduce leakage current even on smaller upcoming processes.
Intel announced that the tri-gate (3D) transistor for high-volume manufacturing has been introduced into production. Since these transistors improve performance and energy efficiency, the company expects tri-gate technology to become the basic building block for future microprocessors even beyond the 45nm process technology node. Compared with the fastest transistor used today, the new technology further lowers the leakage problem, boosts the switching speed by 45%, and lowers the power consumption by 35%.
In the short coming future, Intel would also introduce High-K material and Strained Silicon technologies into production. It will align semiconductor manufacturng to Moore’s law for 10 more years According to the Intel’s roadmap, 45nm products will be released sometime in the second half of 2007. 32nm and 22nm products are also planned to appear on 2009 and 2011.
Moore’s law is the empirical observation that the complexity of integrated circuits, with respect to minimum component cost, doubles every 18 to 24 months. It is attributed to Gordon E. Moore, co-founder of Intel. The law in other words predicts the cost for production would be lower while the performance is enhanced from time to time.