899961085usb 3 0 superspeed1 USB 3.0 to be used as chip to chip interconnect

One of the problems with low power devices such as smartphones and tablets is that you have limited options when it comes to the bus that the various chips use to communicate with each other. Most devices use fairly slow interfaces such as GPIO, HSIC or various MIPI interfaces rather than something like PCI Express that you'd find a PC. Now it looks like the USB-IF wants to replace these chipset interconnects with USB 3.0.

One of the problems with low power devices such as smartphones and tablets is that you have limited options when it comes to the bus that the various chips use to communicate with each other. Most devices use fairly slow interfaces such as GPIO, HSIC or various MIPI interfaces rather than something like PCI Express that you'd find a PC. Now it looks like the USB-IF wants to replace these chipset interconnects with USB 3.0.

Beyond GPIO and the MIPI interfaces, the good old USB interface is of course also widely implemented as well as SDIO, but even these interfaces are relatively slow as a chip to chip interconnect. As such, something faster is needed and although it might sound like a crazy idea at first to move the USB 3.0, the USB-IF is working together with the MIPI alliance to make this a reality and is even relying on the M-PHY physical layer developed by the MIPI alliance. Furthermore the HSIC interface was based on USB 2.0 so it's logical to build on that standard and as such the USB 3.0 interface will be known as SSIC or Super Speed Inter-Chip.

For your average consumer this might not seem like a big deal to start with, but when you consider that a lot of the peripheral chipsets in your average smartphone and tablet are starting to be limited by the chip interconnects, then you quickly realise that something needs to be done. The implementation of USB 3.0 in this case is for very short PCB traces and it's quite different to what is used in PCs, but on the other hand it's also much more power efficient and should be easier to implement in the type of devices it will be going into than say PCI Express.

Interestingly there will be several different configurations on offer and the USB-IF is using the same terms as the PCI-SIG calling it x1, x2 and x4 lanes, although we don't know how much bandwidth will be available per lane at this point in time, but an educated guess is 5Gbps for four lanes, 2.5Gbps for two lanes and 1.25Gbps for one lane based on the theoretical maximum speed of USB 3.0. The SSIC standard is still being developed and isn't likely to reach a final stage until sometime next year and after that it's likely to take some time before it gets implemented in the various chips that goes into mobile devices. That said, by then there will be an actual need for the faster interface if not before.